STM32F103 Since I tried to get the IDE working with version 2.0+ working with linux, I had a problem. So I wanted it to work, so I started with bare metal:
/**
******************************************************************************
* @file : main.c
* @author : Sherm and STM32CubeIDE
* @brief : Main program body
******************************************************************************
* Testing fastest loop speed. found 4MHz with 8MHz crystal.. but good
******************************************************************************
*/
#include <stdint.h>
#if !defined(__SOFT_FP__) && defined(__ARM_FP)
#warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use."
#endif
#define RCC_BASE 0x40021000
#define RCC_CR (*((volatile unsigned int *)(RCC_BASE + 0x00)))
#define RCC_CFGR (*((volatile unsigned int *)(RCC_BASE + 0x04)))
#define FLASH_ACR (*((volatile unsigned int *)(0x40022000)))
#define GPIOC_BSRR (*((volatile unsigned int *)0x40011010))
void SetClock72MHz(void) {
// 1. Enable HSE (External Crystal)
RCC_CR |= (1 << 16);
while (!(RCC_CR & (1 << 17))); // Wait until HSE is ready
// 2. Set Flash Latency (IMPORTANT: 72MHz requires 2 wait states)
FLASH_ACR |= 0x2;
// 3. Configure PLL: HSE as source, Multiply by 9 (8MHz * 9 = 72MHz)
// PLLSRC (bit 16) = 1, PLLMUL (bits 18-21) = 0111 (7) for x9
RCC_CFGR &= ~((0xF << 18) | (1 << 16)); // Clear
RCC_CFGR |= ((0x7 << 18) | (1 << 16));
// 4. Enable PLL
RCC_CR |= (1 << 24);
while (!(RCC_CR & (1 << 25))); // Wait until PLL is locked
// 5. Select PLL as System Clock
RCC_CFGR &= ~(0x3); // Clear SW bits
RCC_CFGR |= 0x2; // Set SW to PLL
while (((RCC_CFGR >> 2) & 0x3) != 0x2); // Wait for switch
}
int main(void) {
SetClock72MHz(); // Now running at 72MHz
// Enable GPIOC clock
*((volatile unsigned int *)0x40021018) |= (1 << 4);
// Set PC13 to 50MHz Output (0x3)
*((volatile unsigned int *)0x40011004) &= ~(0xF << 20);
*((volatile unsigned int *)0x40011004) |= (0x3 << 20);
/* while(1) {
// Direct toggle (Fastest possible)
*((volatile unsigned int *)0x4001100C) ^= (1 << 13);
}*/
while(1) {
GPIOC_BSRR = (1 << 13); // Set High
GPIOC_BSRR = (1 << (13 + 16)); // Reset Low
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13); // Set High
GPIOC_BSRR = (1 << (13 + 16)); // Reset Low
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13); // Set High
GPIOC_BSRR = (1 << (13 + 16)); // Reset Low
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13); // Set High
GPIOC_BSRR = (1 << (13 + 16)); // Reset Low
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
GPIOC_BSRR = (1 << 13);
GPIOC_BSRR = (1 << (13 + 16));
}
}